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Speaker: Glen Fox Registration is optional, but we want to know who to expect. 10:00 AM P.S.T. You can log in at 9:45 AM (12:45 PM Montreal) to check connection and say hello.All IEEE members are welcome, especially those Life Members that don't have a local Affinity Group. There was no speaker for last month, busy with Christmas. We are looking for speakers for the rest of the year, contact Carl Zanon if interested. Speaker(s): Glen Fox, Agenda: In the 1940s, the Alberta government asked the Investor Owned Utilities (IOUs) to bring power to rural Alberta. The IOUs declined, citing cost as a factor. With this reality, Alberta farmers decided to step up and formed co-operatives, also known as Rural Electrification Associations (REAs), to bring electricity to rural Alberta. Virtual: https://events.vtools.ieee.org/m/344529

R7 LMAG Executive Teleconference - MONTHLY MEETING Oakville, Ontario, Canada, L6H 2B1, Virtual: https://events.vtools.ieee.org/m/348987

A technique is proposed for increasing the data rate transmitted through an inductively coupled chip-to-chip link by resetting the channel state variables. This allows the data rate to be increased well beyond what is implied by the channel bandwidth. In the proposed scheme, the two sides of the link are resonated at the highest possible quality factor, maximizing link gain, and minimizing interference. The transmit signal is a binary matched pulse which maximizes the received signal for a given transmitter voltage limit. High-efficiency switching transmitters can be used for this type of signal. The proposed technique can be applied to communication links in which channel state variables are accessible for reset. For increasing the data rate, it is shown that the proposed state-variable reset technique results in a higher signal-to-noise ratio of the received signal and a higher energy efficiency compared to reducing the quality factor to widen the bandwidth, using equalization, or using multi- level signaling. The technique is demonstrated on a chip-to-chip link with coupled 1.5 mm × 1.5 mm planar inductors separated by 0.5mm in a 0.18μm CMOS process. 500 Mb/s data rate is achieved over a link which has a band-pass bandwidth of 185 MHz. Co-sponsored by: Glenn Cowan Speaker(s): Dr. Nagendra Krishnapura, Room: 1.162, Bldg: EV, 1515 St. Catherine St. W, Montresl, Quebec, Canada

The North American Workshop on Silicon Photonics for High-Performance Computing (SPHPC) will bring together experts in Silicon Photonics and in High-Performance Computing (HPC architects and experts, interconnect architects, HPC systems modeling, etc.) to discuss the state-of-the-art with Silicon Photonics based HPC interconnects and computing platforms (e.g., AI accelerators), and the main challenges that must be addressed to accelerate their development. It will consist of invited talks of the highest caliber from academia, industry, and government agencies as well as from different related disciplines. For SPHPC’23, we will focus on a special theme on Photonics for AI and AI for Photonics. In addition, SPHPC will host a student presentation session to invite students working in this area to present their projects at the workshop and receive feedback on their work. This is the event for meeting professionals in the field as well as exchanging and exploring new ideas. About SPHPC - https://www.engr.colostate.edu/SPHPC/ Silicon photonics has emerged as a promising solution to realize high-performance computing (HPC) systems required in the Big Data era. Having various applications in the domains of HPC, data centers, sensors and bio-sensing, aerospace, artificial intelligence (AI), etc., it has attracted researchers from academia and industries in different fields to explore various benefits and challenges of this technology. As an emerging area, it demands multidisciplinary collaborations and contributions, from material science and engineering, for realizing low-loss CMOS compatible components, to novel system architectures and software CAD and design tools to explore the design space of the resulting complex devices and systems. The North American Workshop on Silicon Photonics for High-Performance Computing (SPHPC) brings together experts from academia and industry working on silicon photonics and HPC (and other applications) to discuss the latest advances, remaining challenges, and research opportunities in this field. Co-sponsored by: Silicon Photonics high-performance computing (SPHPC), 29th IEEE International Symposium on High-Performance Computer Architecture (HPCA-29); Centre for Systems, Technologies and Applications for Radiofrequency and Communication (STARaCom); Agenda: https://www.engr.colostate.edu/SPHPC/program/ Time Speaker Topic Session 1 Chair: Mahdi Nikdast (Feb. 26th) 8:00 am – 8:20 am Volker J. Sorger George Washington University, USA Photonic Machine Intelligence: Tensor Core, Convolution Accelerator, Chip Packaging 8:20 am – 8:40 am Sean Pang University of Central Florida, USA Coherent Matrix Accelerator for Scalable Photonic Information Processing 8:40 am – 9:00 am Sudeep Pasricha Colorado State University, USA Cross-Layer Design of Machine Learning Accelerators with Silicon Photonics 9:00 am – 9:20 am Ajay Joshi, Boston University, USA Photonic Computing Architectures for AI: A Systems Perspective 9:20 am – 9:40 am Sebastien Le Beux Concordia University, Canada A Nanophotonic Interconnect based on Non-Volatile Phase Change Material 9:40 am – 9:50 am Kh Arif Shahriar PhD student, ECE Department, McGill University, Canada TBC 9:50 am – 10:00 am Daniel Hutama School of Electrical and Computer Engineering, University of Ottawa, Canada TBC Coffee break 10:00 am – 10:20 am Session 2 Chair: Kaveh Rahbardar Mojaver (Feb. 26th) 10:20 am – 10:40 am Bhavin Shastri Queens University, Canada Neuromorphic Silicon Photonics and Applications from Classical to Quantum 10:40 am – 11:00 am Emanuel Peinke 3e8, Canada A Scalable Optics Computing Approach 11:00 am – 11:20 am Nathan Youngblood University of Pittsburgh, USA Photonic Architectures for Computing In Memory Using Nonvolatile Optical Materials 11:20 am – 11:40 am Dan-Xia Xu National Research Council (NRC), Canada Optimization in the Non-Convex Design Space of Nanophotonic Components: Mitigation Strategies Using Machine Learning 11:40 am – 12:00 pm Dusan Gostimirovic McGill University, Canada Fabrication-Aware Design of Integrated Photonic Devices Using Convolutional Neural Networks 12:00 pm – 12:20 pm David Pan The University of Texas at Austin, USA Closing the Virtuous Cycle of Photonics for AI and AI for Photonics Hotel Bonaventure Montreal, 900 Rue De La Gauchetière O, Montréal, Quebec, Canada, H5A 1E4

Soldering made easy thanks to IEEE Concordia’s popular soldering tutorial! When you want to make a circuit that will last, breadboards are no good - parts can fall out, connections can fail, and high-speed signals get scrambled. Learning to solder will allow you to make solid, professional circuits and fix existing circuit boards in your TV, computer and more! NO PREVIOUS EXPERIENCE REQUIRED. This workshop caters to students of any level - whether you're a beginner to electronics or already comfortable designing circuits and making basic PCBs. Places are limited - make sure to get your ticket ASAP! DETAILS Date: March 8th, 2023 Time: 6:30pm - 8:30pm Location: B Annex Lounge, B-104, 2160 Bishop St. Tickets: $10 on VTools Room: B104, Bldg: B-Annex, 2160 Bishop St, Montreal, Quebec, Canada, H3G 2E9

Soldering made easy thanks to IEEE Concordia’s popular soldering tutorial! When you want to make a circuit that will last, breadboards are no good - parts can fall out, connections can fail, and high-speed signals get scrambled. Learning to solder will allow you to make solid, professional circuits and fix existing circuit boards in your TV, computer and more! NO PREVIOUS EXPERIENCE REQUIRED. This workshop caters to students of any level - whether you're a beginner to electronics or already comfortable designing circuits and making basic PCBs. Places are limited - make sure to get your ticket ASAP! DETAILS Date: March 8th, 2023 Time: 6:30pm - 8:30pm Location: B Annex Lounge, B-104, 2160 Bishop St. Tickets: $10 on VTools Room: B104, Bldg: B-Annex, 2160 Bishop St, Montreal, Quebec, Canada, H3G 2E9

In this talk, a novel wireless infrastructure will be presented which includes a new stratospheric access & computing layer composed of high altitude platform station (HAPS) constellations positioned in stratosphere in addition to the legacy terrestrial layer and the emerging satellite layer. With its bird's-eye and almost-line-of-sight view of an entire metropolitan area, a HAPS is more than a base station in the air; it is a new architecture paradigm with access, transport, and core network functionalities for integrated connectivity, computing, sensing, positioning, navigation, and surveillance, towards enabling a variety of use-cases in an agile, smart, and sustainable manner for smart cities and societies of the future. Speaker: Professor Halim Yanikomeroglu Non-Terrestrial Networks (NTN) Lab Department of Systems and Computer Engineering Carleton University, Ottawa, Canada Speaker(s): Dr. Halim Yanikomeroglu, Virtual: https://events.vtools.ieee.org/m/350375

The Montreal Chapter of the IEEE Signal Processing Society cordially invites you to attend (in presence) the following talk to be given at McGill University by Ph.D. candidate Wesley L. Passos, from the Federal University of Rio de Janeiro (COPPE/UFRJ). Speaker(s): Wesley L. Passos, Room: 603, Bldg: McConnell Eng., 3480 , Montreal, Quebec, Canada, H3A 0E9

Chairs and Officers of all Chapters, Affinity Groups (WIE, YP, IR, Humanitarian, etc...), Student Branches, Counselors, Ambassadors, and ExCom: Please join us for an in person meeting on March 16th, from 18:00 to 21:00. This meeting is a chance to see each other after a long time, discuss accomplishments of the previous period, and plan for the future events. It would be great if everyone could make an effort and attend the meeting. Bldg: EV002.184, 800, De La Gauchetière W. Suite 6900 , INRS, Montréal, Quebec, Canada, H5A 1K6

For efficient design, verification and validation of integrated circuits and components it is important to have an easy to customize workflow. Python has become the standard programming language for machine learning, scientific computing and engineering. In this talk we describe the gdsfactory design automation tool. GDSfactory provides you an end to end workflow that combines layout, verification and validation, which is an extensible, open source, python driven flow for turning your chip designs into validated products. Speaker(s): Joaquin Matres, Ph.D., Virtual: https://events.vtools.ieee.org/m/348254